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Fast statistical methods of interconnect delay and slew in the presence of process fluctuations are proposed. Using an optimized quadratic model to describe the effects of process variations, the proposed method enables closed-for...
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Fast statistical methods of interconnect delay and slew in the presence of process fluctuations are proposed. Using an optimized quadratic model to describe the effects of process variations, the proposed method enables closed-form expressions of interconnect delay and slew for the given variations in relevant process parameters. Simulation results show that the method, which has a statistical characteristic similar to traditional methodology, is more efficient compared to HSPICE-based Monte Carlo simulations and traditional methodology.
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Correcting near-surface velocity and elevation variations with statics is an essential step in land seismic data-processing sequences. In marine seismic processing, static corrections for water-velocity variations or tidal variati...
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Correcting near-surface velocity and elevation variations with statics is an essential step in land seismic data-processing sequences. In marine seismic processing, static corrections for water-velocity variations or tidal variations are often required, and, occasionally, we can even correct for near-surface velocity variations. Ten years ago, recognizing the importance of static corrections in seismic processing, SEG published Static Corrections for Seismic Reflections Surveys by Mike Cox. This book is an invaluable reference to anyone trying to solve or understand a difficult statics problem. In an afterword to this introduction, Cox has kindly contributed his thoughts and observations on static corrections in the intervening decade.
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In many surveying applications, determination of accurate heights is of significant interest. The delay caused by the neutral atmosphere is one of the main factors limiting the accuracy of GPS positioning and affecting mainly the ...
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In many surveying applications, determination of accurate heights is of significant interest. The delay caused by the neutral atmosphere is one of the main factors limiting the accuracy of GPS positioning and affecting mainly the height coordinate component rather than horizontal ones. Estimation of the zenith total delay is a commonly used technique for accounting for the tropospheric delay in static positioning. However, in the rapid static positioning mode the estimation of the zenith total delay may fail, since for its reliable estimation longer observing sessions are required. In this paper, several troposphere modeling techniques were applied and tested with three processing scenarios: a single baseline solution with various height differences and a multi-baseline solution. In specific, we introduced external zenith total delays obtained from Modified Hopfield troposphere model with standard atmosphere parameters, UNB3m model, COAMPS numerical weather prediction model and zenith total delays interpolated from a reference network solution. The best results were obtained when tropospheric delays derived from the reference network were applied.
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This paper considers a network of vehicles moving in a two dimensional plane. The overall network, described by a collection of double integrator dynamics, is controlled by a novel distributed static output feedback methodology to...
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This paper considers a network of vehicles moving in a two dimensional plane. The overall network, described by a collection of double integrator dynamics, is controlled by a novel distributed static output feedback methodology to maintain a desired formation. The distributed control architecture stabilizes the network using static output feedback of position information only, by exploiting delays in communication of the relative information. An optimization algorithm, based on Linear Matrix Inequalities together with the DIRECT search algorithm, is used to synthesize the controller gains and the delay.
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A detailed study is presented of the effects of surface topography on ToF-SIMS images, using experimental results from model conducting fibres, consisting of gold wires of diameters in the range of 33-125 μm mounted onto silicon ...
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A detailed study is presented of the effects of surface topography on ToF-SIMS images, using experimental results from model conducting fibres, consisting of gold wires of diameters in the range of 33-125 μm mounted onto silicon wafers, and ion optics simulations using SIMION. Chemical analysis over the whole of the fibre surface is not possible, and typically only the central15 μm of the fibre can be observed. Signals from the substrate are also shadowed by the presence of the fibre. Both effects are caused by the distortion of the extraction field around these conducting samples. We provide clear guidance to practical analysts for the reduction of the topographic field effects, by the use of a lower extractor voltage and an extraction delay. In particular, the effects of extraction delay on ion intensities, mass resolution and time-of-flight are studied in detail. In addition, for large incidence angles of ≥55°, a fraction of the Bi~+ primary ions are scattered from the fibre target, emitting secondary ions from the substrate which are recorded at the location of the fibre. A method to diagnose this effect is given.
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In this paper, we propose a process-variability-aware adaptive test flow that realizes efficient and comprehensive detection of parametric faults. A parametric fault is essentially a malfunction in a large-scale integration chip, ...
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In this paper, we propose a process-variability-aware adaptive test flow that realizes efficient and comprehensive detection of parametric faults. A parametric fault is essentially a malfunction in a large-scale integration chip, which is caused by the variability in fabrication processes. In our adaptive test framework, test pattern sets are altered on individual chips in order to apply the optimal set of test patterns for each chip, and thus the test coverage is improved and the test time is reduced. The test pattern is chosen on the basis of parameter estimations measured using an on-chip sensor with respect to statistical timing information. We also propose a novel metric to quantize the test coverage suitable for evaluating the test quality of parametric faults. Our experimental results using an industrial design show that the proposed flow significantly improves the parametric fault coverage and test efficiency compared to conventional test flows.
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CMOS devices play a major role in most of the digital design, since CMOS devices have larger density and consume less power. The integrated circuit performance mostly depends on the basic devices and its scaling methods, but in co...
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CMOS devices play a major role in most of the digital design, since CMOS devices have larger density and consume less power. The integrated circuit performance mostly depends on the basic devices and its scaling methods, but in conventional CMOS devices in ultra deep submicron technology, leakage power becomes the major portion apart of dynamic power. The demerits of the conventional CMOS is less speed and, more leakage, for any digital design PDP is the figure of merit which can be used to determine energy consumed per switching event, hence we designed a NOVEL NMOS and PMOS which has superior performance than conventional PMOS and NMOS, the design and performance checked at 90 nm, 180 nm and 45 nm technology and calculate the performance values.
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A digital synchronous mirror delay combined with an analog delay-locked loop (DLL) is introduced. Under the influence of process, voltage, temperature, and load variations, the conventional digital synchronous mirror delay could n...
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A digital synchronous mirror delay combined with an analog delay-locked loop (DLL) is introduced. Under the influence of process, voltage, temperature, and load variations, the conventional digital synchronous mirror delay could not compensate the static phase error because of its digital type and open loop by nature. The proposed circuit can compensate the delay mismatch between the output buffer and the inner stage, which is caused by the different loading conditions. It can improve the noise immunity from supply variations. Moreover, because of the tracking property of the DLL, the static phase error and jitter could also be reduced. The proposed circuit has been fabricated by a CMOS 0.35-μrn one-poly four-metal process and the whole chip area is 1.47 0133 1.07 mm{sup}2 including I/O pad peripherals. The measured peak-to-peak jitter is 16.4 ps at supply voltage of 3.3 V and frequency of 300 MHz. The power consumption of the entire chip is 16.5 mW for analog part and 84 mW for digital part. The comparisons between the proposed circuit and the conventional digital synchronous mirror delay are also demonstrated.
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This paper is concerned with the problems of stability and dissipativity analysis for static neural networks (NNs) with time delay. Some improved delay-dependent stability criteria are established for static NNs with time-varying ...
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This paper is concerned with the problems of stability and dissipativity analysis for static neural networks (NNs) with time delay. Some improved delay-dependent stability criteria are established for static NNs with time-varying or time-invariant delay using the delay partitioning technique. Based on these criteria, several delay-dependent sufficient conditions are given to guarantee the dissipativity of static NNs with time delay. All the given results in this paper are not only dependent upon the time delay but also upon the number of delay partitions. Some examples are given to illustrate the effectiveness and reduced conservatism of the proposed results.
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Airfoil stall plays a central role in the design of safe and efficient lifting surfaces. We typically distinguish between static and dynamic stall based on the unsteady rate of change of an airfoil's angle of attack. Despite the s...
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Airfoil stall plays a central role in the design of safe and efficient lifting surfaces. We typically distinguish between static and dynamic stall based on the unsteady rate of change of an airfoil's angle of attack. Despite the somewhat misleading denotation, the force and flow development of an airfoil undergoing static stall are highly unsteady and the boundary with dynamic stall is not clearly defined. We experimentally investigate the forces acting on a two-dimensional airfoil that is subjected to two manoeuvres leading to static stall: a slow continuous increase in angle of attack with a reduced pitch rate of 1.3 x 10(-4) and a step-wise increase in angle of attack from 14.2 degrees to 14.8 degrees within 0.04 convective times. We systematically quantify the stall reaction delay, or the timespan between the moment the blade exceeds its critical static stall angle and the onset of stall, for many repetitions of these two manoeuvres. The onset of flow stall is marked by the distinct drop in the lift coefficient. The reaction delay for the slow continuous ramp-up manoeuvre is not influenced by the blade kinematics and its occurrence histogram is normally distributed around 32 convective times. The static reaction delay is compared with dynamic stall delays for dynamic ramp-up motions with reduced pitch rates ranging from 9 x 10(-4) to 0.14 and for dynamic sinusoidal pitching motions of different airfoils at higher Reynolds numbers up to 1 x 10(6). The stall delays for all conditions follow the same power law decrease from 32 convective times for the most steady case down to an asymptotic value of 3 convective times for reduced pitch rates above 0.04. Static stall is not phenomenologically different than dynamic stall and is merely a typical case of stall for low pitch rates where the onset of flow separation is not promoted by the blade kinematics. Based on our results, we suggest that conventional measurements of the static stall angle and the static load curves should be conducted using a continuous and uniform ramp-up motion at a reduced frequency around 1 x 10(-4). (C) 2021 The Author(s). Published by Elsevier Ltd.
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